John Cockerill

About the Company

John Cockerill designs, integrates, modernizes and maintains equipment in the domains of energy, defence, steelmaking, the environment and industry in general.
John Cockerill assists its clients throughout the whole of the lifecycle of their equipment, to improve its economic, technical and environmental performance.
The benefits of John Cockerill are numerous: a unique combination of engineering and maintenance expertise and in the management of technical international projects, a vast geographical and technological scope and a capacity of innovation based on the concrete need of its clients.
John Cockerill has an experienced workforce of 6,000 in Africa, North America, Brazil, China, Europe, India, Indonesia, Mexico, New Caledonia, Saudi Arabia and South Korea.
Proud of its past and aware of its ability to invent the processes of the future, John Cockerill intends to contribute to today's societal challenges and generate sustainable industrial progress for the benefit of its customers, employees, shareholders, surrounding communities and the planet.

Listed Jobs

Company Name

John Cockerill

Job Title

Chargé d'affaires Maintenance Pont Roulant F/H

Job Description

Clermont-ferrand, France

On site

28-09-2025

Company Name

John Cockerill

Job Title

Stage/Internship - Development of an FPGA based multiple CAN System

Job Description

**Job title:** Stage/Internship – Development of an FPGA Based Multiple CAN System **Role Summary:** Support the design and validation of a proof‑of‑concept FPGA‑based CAN bus bridge capable of handling up to eight CAN interfaces with configurable speed and protocol, using Xilinx FPGA technology (e.g., Zynq UltraScale+). **Expectations:** Deliver a functional prototype FPGA bitstream, validate communication through simulation and hardware tests, and extend the design to five‑CAN and eight‑CAN configurations. **Key Responsibilities:** - Study CAN bus protocol and Xilinx FPGA architecture. - Research existing IP cores and evaluate development boards. - Define hardware requirements and system architecture. - Design a customized FPGA bitstream integrating a configurable CAN bridge. - Create VHDL/UVM testbenches for simulation testing. - Validate functionality and stability on a Xilinx development board. - Scale the design to support pentac (5‑CAN) and octa (8‑CAN) bus versions. **Required Skills:** - Knowledge of CAN bus communication and protocols. - Experience with Xilinx FPGA development (Vivado, IP integration). - Proficiency in VHDL and simulation testbench development (UVM). - Familiarity with JTAG and Quad‑SPI interfaces. - Ability to translate technical specifications into design requirements. - Strong written and verbal communication in English and French (minimum B2). **Required Education & Certifications:** - Current enrolment in a Master’s degree program in Electronic Engineering or related field. - Minimum B2 proficiency in French and English. - Availability for a continuous internship period of 2–3 months.

Ans, Belgium

On site

09-10-2025

Company Name

John Cockerill

Job Title

Stage/Internship - Development of an FPGA based AXI4 lite to BiSS IP

Job Description

**Job Title:** Stage/Internship – Development of an FPGA‑Based AXI4‑Lite to BiSS IP **Role Summary:** Assist in creating a proof‑of‑concept IP that implements the BiSS protocol over an AXI4‑Lite interface, integrating it into a Xilinx FPGA (e.g., Zynq UltraScale+). The intern will adapt an existing SSI IP to support both SSI and BiSS, develop simulation testbenches, and validate the IP in real hardware. **Expectations:** - Gain hands‑on experience with FPGA design and IP integration. - Deliver a functional BiSS IP compatible with a Xilinx development board. - Validate performance through simulation (VHDL/UVM) and hardware testing. - Merge the new BiSS logic into the existing SSI IP and update register maps. **Key Responsibilities:** - Understand SSI and BiSS protocols and Xilinx FPGA architecture. - Analyze and modify the existing AXI4‑Lite SSI IP. - Design and implement the BiSS interface IP and its AXI4‑Lite wrapper. - Create VHDL and/or UVM testbenches for functional verification. - Develop and run software drivers to interact with the IP on hardware. - Merge BiSS logic into the SSI IP, adjust register maps, and re‑validate. - Document design decisions, test results, and integration procedures. **Required Skills:** - Proficiency in VHDL and FPGA design concepts. - Familiarity with Xilinx Vivado tools and FPGA development boards. - Experience with AXI4‑Lite protocol and register‑interface design. - Knowledge of simulation frameworks (UVM, VHDL testbenches). - Ability to write C/C++ software to interface with FPGA IP. - Strong analytical and problem‑solving capabilities. - Good written and verbal communication in English; French (B2) preferred. **Required Education & Certifications:** - Current enrollment in a master’s program in Electrical/Electronics Engineering or related field. - Minimum 2‑3 month internship availability. ---

Ans, Belgium

On site

09-10-2025

Company Name

John Cockerill

Job Title

Stage/Internship - Development of a rugged 24V/48V BMS

Job Description

**Job title:** Stage/Internship – Development of a rugged 24V/48V BMS **Role Summary:** Assist in designing, selecting, and prototyping a battery‑management system for 24 V and 48 V rugged applications with RMS current >100 A. Responsibilities include architecture definition, IC evaluation, PCB design, and prototype validation. **Expectations:** - 2–3 month full‑time internship. - Master’s‑level student in electronics or related field. - Proficiency in French (B2) and English. **Key Responsibilities:** - Analyse BMS requirements for 24 V/48 V cylindrical cell assemblies (18650/21700). - Define a scalable architecture supporting both voltage levels. - Select suitable BMS ICs based on specifications. - Test and validate selected ICs on demo boards under realistic conditions. - Design and fabricate a PCB prototype meeting footprint, electrical, and ruggedness criteria. - Collaborate with mechanical and prototyping teams for integration. - Document design decisions, test results, and validation outcomes. **Required Skills:** - Knowledge of battery technologies, power electronics, and BMS fundamentals. - Proficiency in PCB design tools (KiCad, Altium, etc.) and schematic capture. - Experience with electrical testing and data analysis. - Understanding of ruggedization (temperature, vibration, EMI). - Strong analytical and problem‑solving abilities. - Effective written and verbal communication in English and French. **Required Education & Certifications:** - Current enrolment in a master’s program in Electronics, Electrical Engineering, or a related discipline. - Minimum B2 certification in French and English (verified by language test or university record).

Ans, Belgium

On site

09-10-2025